Researchers develop smaller, more efficient space-tolerant computer chips

Image of planet earth from outer space. Credit: Carnegie Mellon College of Engineering

Space is a highly volatile environment. Factors like radiation, extreme temperatures, and debris make outer space a challenging environment for operating technology. In particular, radiation can have devastating effects on computer chips.

Space radiation, from solar flares or galactic cosmic rays, alters the electrical properties of an integrated circuit. The most vulnerable parts of a computer chip to radiation effects are the data storage elements, like flip-flops (FF) commonly used in digital logic. While radiation-hardened (rad-hard) electronics already exist to withstand harsh radiation environments, Carnegie Mellon researchers have fabricated more compact rad-hard chips that achieve equivalent or better radiation tolerance than conventional radiation-tolerant designs.

The team won a Best Paper Award for their paper, “A Soft Error Tolerant Flip Flop for eFPGA Configuration Hardening in 22nm FinFET Process,” at the recent Design, Automation and Test in Europe (DATE) Conference held in Lyon, France. The work is a collaboration with Sandia National Labs on radiation-tolerant microelectronics for space and aerospace applications.

“As FFs are one of the most common elements on a chip, reducing the area of the FF has a significant reduction in the overall chip area,” explains Ken Mai, principal systems scientist in the electrical and computer engineering department and an author of the paper. “Lower area leads to lower manufacturing costs, higher performance, and better energy efficiency, which is particularly important for space applications.”

Most chips in space use FF designs that occupy more area on the chip than the one that the team designed. The crux of the invention is that the team achieved the same or better tolerance of radiation than the conventional FF designs, but in a smaller area.

“While the specific components or transistors used are not specific to Carnegie Mellon, the way they are arranged is our own invention,” explains Mai.

Traditional robust FF designs use triple modular redundancy, majority vote of three copies of the same circuit block, to ensure error-free operation. This updated design reuses some of the components of a single basic FF to achieve the same level of radiation tolerance without the high area overhead of using three copies of the FF.

Currently, the team is designing full system-on-a-chip prototypes and plan to test and deploy on a cubesat in 2026 in collaboration with Brandon Lucia and Zac Machester’s Spacecraft Design-Build-Fly Lab course.

Provided by
Carnegie Mellon University Electrical and Computer Engineering


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